How to install a soft-reset GPIO for MicroBlaze

Problem Description

In many cases it is useful to be able to reset the System from within Software (U-Boot/Linux).

The Reset GPIO allows the processor to reset the system and complete a complete reset start up with a simple GPIO core and the Processor System Reset Module.

Background

 The MicroBlaze CPU do not provide a software-accessible reset controller, and thus by default cannot  be internally reset or restart itself or the system.

The Xilinx "Processor System Reset Module" IP core does however provide an auxiliary reset input signal which can work in conjunction with the MicroBlaze external reset to provide a system-wide reset architecture. Combining the auxiliary signal with a GPIO core can allow software to reset the system.

Methodology

HARDWARE CONFIGURATION

To use the Reset GPIO, you will need to add a GPIO core to the System. Open your EDK project in Xilinx Platform Studio.

Add a GPIO core to the system, which has a single GPIO bit on the first channel. Connect the "Aux_Reset_In" of your "proc_sys_reset" core to the "GPIO_IO_O" signal of the GPIO core you have added.

The MHS fragment for this should look as follows:

BEGIN proc_sys_reset
...
 PORT Aux_Reset_In = internal_reset_request
END
...
BEGIN axi_gpio
 PARAMETER INSTANCE = reset_gpio
 PARAMETER C_GPIO_WIDTH = 1
 PORT GPIO_IO_O = internal_reset_request
...
END

Regenerate the bit-stream and export the project to XSDK.

Note that all of the PetaLogix-provided 'FULL' reference designs contain this infrastructure, so you can study the source files to see a working example.

SOFTWARE CONFIGURATION

Create (See PetaLinux SDK Board Bring-up Guide for details on bring-up process) or open your XSDK workspace for the platform. 

Within XSDK configure the BSP option called "periph_type_overrides", set this field to include the value:

{hard-reset-gpios <instance_name> <reset_pin> <gpio_size>}

Where "<instance_name>" is the name of the GPIO core instance in the system, "<reset_pin>" is the index of the GPIO pin which is connected to the reset signal and "<gpio_size>" is the size width of the GPIO cores output. The following example is based on the MHS/EDK System shown in the previous section.

{hard-reset-gpios reset_gpio 0 1}

Rebuild the BSP and update the configuration of PetaLinux using the "petalinux-copy-autoconfig". Change to "$PETALINUX/software/petalinux-dist" and rebuild the system by running "make".

Boot the system to U-Boot, and test the "reset" command.

gpiochip_add: registered GPIOs 255 to 255 on device: /axi@1/gpio@40000000
XGpio: /axi@1/gpio@40000000: registered, base is 255
...
RESET: Registered gpio device: 255, current val: 0